1. Field
The present invention relates to radio frequency (RF) power amplifiers and more particularly to a RF power amplifiers employing low voltage transistors.
2. Background
Many single chips, sometimes called system-on-chip (SOC) solutions, are used in wireless communication devices such as cell phones, pagers, cable television boxes, remote controllers, personal digital assistants (PDAs), and other wireless devices. Such devices need to transmit signals across several feet or even yards. High efficiency radio frequency (RF) power amplifiers are used to amplify signals so they may be transmitted such distances. The more power the power amplifiers can deliver to the antenna, the further the device can transmit. Unfortunately, development of high-efficiency RF power amplifiers suitable for wireless SOC solutions remains a major unsolved challenge because the transistors in the power amplifiers breakdown due to the high voltages to which they are subject.
The voltage at which a transistor breaks down is a function of the size of the transistor. The smaller the transistor, the lower the voltage it can tolerate before permanent damage occurs. This is problematic because transistors are getting smaller so that more transistors may fit in smaller spaces as devices get smaller.
To illustrate, FIG. 1 shows a prior art solution for preventing transistor breakdown. FIG. 1 shows a cascode structure 100 in a high-efficiency RF power amplifier 100 with fixed bias. The cascode structure 100 includes cascode device 102, driver devices 104 and 106, an inductor 108, and a capacitor 110. FIG. 2 is a graphical representation 200 including a typical input waveform 204 for the cascode structure 100 and includes a “y” axis representing voltage and an “x” axis representing time. FIG. 3 is a graphical representation 300 including a typical output waveform 302 for the cascode structure 100 when the waveform 204 is applied. The graphical representation includes an “y” axis representing voltage and a “x” axis representing time.
A waveform 302 illustrates that when the waveform 204 is applied to the cascode structure 100 at a time tm the voltage across the gate-drain junctions of the transistor 102 (VG-D) may be more than twice as large as the power supply voltage VDD. Such high voltage may cause the gate-drain junction of the transistors 102 to break down.
There is another challenge to developing the cascode structure 100 for SOC involving the fact that the transistors 102 and 104 are connected in series. Ideally the transistors 102 and 104 should be switches such that when they are on, they are short circuits and when they are off they are open circuits. Unfortunately, in real circuits, when a transistor is on it has a resistance associated with it that consumes power otherwise intended for the antenna and output power of the device.
There is still another challenge facing development of high-efficiency RF power amplifiers for wireless SOC solutions involving the amplifier class. Amplifier operation can be classified generally as “linear” or “nonlinear.” Classes A, B, and AB, are commonly considered linear classes of RF power amplifiers and classes C, E, and F are commonly considered nonlinear classes. To change the class of operation, the conduction angle of the linear power amplifier is changed. The conduction angle is the portion of time that the power amplifier (or device) is on (or conducting) expressed in degrees. Traditional techniques for changing the conduction angle involve operators manually adjusting analog voltage levels and other parameters.
As applied to FIG. 1, the operator would adjust the value the bias voltage applied to a matching network formed by the inductor 108 and the capacitor 110 via a VBIAS pin. The waveforms 202 and 204 illustrate the effect of adjusting the value bias voltage. For instance, the waveform 202 is input into the cascode structure 100 and the waveform 204 is input into the cascode structure 100 when the bias voltage is VLC. Notice that when the bias voltage is VLC the transistor 104 is on some of the time and off some of the time depending on when the voltage level of the waveform 204 crosses the threshold voltage VT of the transistor 104.
There are at least two dilemmas in this arrangement. First, the cascode structure 100 requires the extra (possibly external) VBIAS pin to vary the conduction angle. Second, the size of the blocking capacitor 110 needed to accommodate the width of the transistor 104 is commonly very large, which is counterproductive to integration of RF power amplifiers in small SOC solutions.